View MAX7401_122921.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

19-4788; Rev 1; 6/99
8th-Order, Lowpass, Bessel, Switched-Capacitor Filters
General Description
The MAX7401/MAX7405 8th-order, lowpass, Bessel, switched-capacitor filters (SCFs) operate from a single +5V (MAX7401) or +3V (MAX7405) supply. These devices draw only 2mA of supply current and allow corner frequencies from 1Hz to 5kHz, making them ideal for low-power post-DAC filtering and anti-aliasing applications. They feature a shutdown mode that reduces supply current to 0.2A. Two clocking options are available on these devices: self-clocking (through the use of an external capacitor) or external clocking for tighter corner-frequency control. An offset adjust pin allows for adjustment of the DC output level. The MAX7401/MAX7405 Bessel filters provide low overshoot and fast settling. Their fixed response simplifies the design task to selecting a clock frequency. o 8th-Order, Lowpass Bessel Filters o Low Noise and Distortion: -82dB THD + Noise o Clock-Tunable Corner Frequency (1Hz to 5kHz) o 100:1 Clock-to-Corner Ratio o Single-Supply Operation +5V (MAX7401) +3V (MAX7405) o Low Power 2mA (Operating Mode) 0.2A (Shutdown Mode) o Available in 8-Pin SO/DIP Packages o Low Output Offset: 5mV
Features
MAX7401/MAX7405
Applications
ADC Anti-Aliasing Post-DAC Filtering Air-Bag Electronics CT2 Base Stations Speech Processing
PART MAX7401CSA MAX7401CPA MAX7401ESA MAX7401EPA MAX7405CSA MAX7405CPA MAX7405ESA MAX7405EPA
Ordering Information
TEMP. RANGE 0C to +70C 0C to +70C -40C to +85C -40C to +85C 0C to +70C 0C to +70C -40C to +85C -40C to +85C PIN-PACKAGE 8 SO 8 Plastic DIP 8 SO 8 Plastic DIP 8 SO 8 Plastic DIP 8 SO 8 Plastic DIP
Pin Configuration
TOP VIEW
COM 1 IN 2 GND 3
8 7
CLK SHDN OS OUT
VSUPPLY 0.1F VDD INPUT IN SHDN OUT OUTPUT
Typical Operating Circuit
MAX7401 MAX7405
6 5
VDD 4
SO/DIP
MAX7401 MAX7405
CLOCK CLK GND COM OS 0.1F
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.
8th-Order, Lowpass, Bessel, Switched-Capacitor Filters MAX7401/MAX7405
ABSOLUTE MAXIMUM RATINGS
VDD to GND MAX7401 ..............................................................-0.3V to +6V MAX7405 ..............................................................-0.3V to +4V IN, OUT, COM, OS, CLK ...........................-0.3V to (VDD + 0.3V) SHDN........................................................................-0.3V to +6V OUT Short-Circuit Duration...................................................1sec Continuous Power Dissipation (TA = +70C) 8-Pin SO (derate 5.88mW/C above +70C)................471mW 8-Pin DIP (derate 9.09mW/C above +70C) ...............727mW Operating Temperature Ranges MAX740 _C_A ....................................................0C to +70C MAX740 _E_A .................................................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS--MAX7401
(V DD = +5V, filter output measured at OUT, 10k || 50pF load to GND at OUT, OS = COM, 0.1F from COM to GND, SHDN = VDD, fCLK = 100kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER FILTER CHARACTERISTICS Corner Frequency Clock-to-Corner Ratio Clock-to-Corner Tempco Output Voltage Range Output Offset Voltage DC Insertion Gain with Output Offset Removed Total Harmonic Distortion plus Noise OS Voltage Gain to OUT Input Voltage Range at OS THD+N AOS VOS Input, COM externally driven COM Voltage Range VCOM Output, COM internally biased Input Resistance at COM Clock Feedthrough Resistive Output Load Drive Maximum Capacitive Load at OUT Input Leakage Current at COM Input Leakage Current at OS CLOCK Internal Oscillator Frequency Clock Input Current Clock Input High Clock Input Low fOSC ICLK VIH VIL COSC = 1000pF (Note 4) VCLK = 0 or 5V VDD - 0.5 0.5 29 38 15 48 30 kHz A V V RL CL SHDN = GND, VCOM = 0 to VDD VOS = 0 to (VDD - 1V) (Note 3) 10 50 RCOM VDD / 2 - 0.5 VDD / 2 - 0.2 75 VOFFSET VIN = VCOM = VDD / 2 VCOM = VDD / 2 (Note 2) fIN = 200Hz, VIN = 4Vp-p, measurement bandwidth = 22kHz -0.1 0.25 5 0.15 -82 1 VCOM 0.1 VDD / 2 VDD / 2 + 0.5 V VDD / 2 VDD / 2 + 0.2 125 10 1 500 0.1 0.1 10 10 k mVp-p k pF A A fC fCLK / fC (Note 1) 0.001 to 5 100:1 10 VDD - 0.25 25 0.3 ppm/C V mV dB dB V/ V V kHz SYMBOL CONDITIONS MIN TYP MAX UNITS
2
_______________________________________________________________________________________
8th-Order, Lowpass, Bessel, Switched-Capacitor Filters
ELECTRICAL CHARACTERISTICS--MAX7401 (continued)
(V DD = +5V, filter output measured at OUT, 10k || 50pF load to GND at OUT, OS = COM, 0.1F from COM to GND, SHDN = VDD, fCLK = 100kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER POWER REQUIREMENTS Supply Voltage Supply Current Shutdown Current Power-Supply Rejection Ratio SHUTDOWN SHDN Input High SHDN Input Low SHDN Input Leakage Current VSDH VSDL V SHDN = 0 to VDD 0.1 VDD - 0.5 0.5 10 V V A VDD IDD I SHDN PSRR Operating mode, no load, IN = OS = COM SHDN = GND, CLK driven from 0 to VDD Measured at DC 4.5 2 0.2 60 5.5 3.5 1 V mA A dB SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX7401/MAX7405
ELECTRICAL CHARACTERISTICS--MAX7405
(V DD = +3V, filter output measured at OUT, 10k || 50pF load to GND at OUT, OS = COM, 0.1F from COM to GND, SHDN = VDD, fCLK = 100kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER FILTER CHARACTERISTICS Corner Frequency Clock-to-Corner Ratio Clock-to-Corner Tempco Output Voltage Range Output Offset Voltage DC Insertion Gain with Output Offset Removed Total Harmonic Distortion plus Noise OS Voltage Gain to OUT Input Voltage Range at OS COM Voltage Range Input Resistance at COM Clock Feedthrough Resistance Output Load Drive Maximum Capacitive Load at OUT Input Leakage Current at COM Input Leakage Current at OS RL CL SHDN = GND, VCOM = 0 to VDD VOS = 0 to (VDD - 1V) (Note 3) 10 50 THD+N AOS VOS VCOM RCOM COM internally biased or externally driven VDD / 2 - 0.1 75 VOFFSET VIN = VCOM = VDD / 2 VCOM = VDD / 2 (Note 2) fIN = 200Hz, VIN = 2.5Vp-p, measurement bandwidth = 22kHz -0.1 0.25 5 0.03 -84 1 VCOM 0.1 VDD / 2 VDD / 2 + 0.1 125 10 1 500 0.1 0.1 10 10 fC fCLK/fC (Note 1) 0.001 to 5 100:1 10 VDD - 0.25 25 0.3 ppm/C V mV dB dB V/ V V V k mVp-p k pF A A kHz SYMBOL CONDITIONS MIN TYP MAX UNITS
_______________________________________________________________________________________
3
8th-Order, Lowpass, Bessel, Switched-Capacitor Filters MAX7401/MAX7405
ELECTRICAL CHARACTERISTICS--MAX7405 (continued)
(V DD = +3V, filter output measured at OUT, 10k || 50pF load to GND at OUT, OS = COM, 0.1F from COM to GND, SHDN = VDD, fCLK = 100kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER CLOCK Internal Oscillator Frequency Clock Input Current Clock Input High Clock Input Low POWER REQUIREMENTS Supply Voltage Supply Current Shutdown Current Power-Supply Rejection Ratio SHUTDOWN SHDN Input High SHDN Input Low SHDN Input Leakage Current VSDH VSDL V SHDN = 0 to VDD 0.1 VDD - 0.5 0.5 10 V V A VDD IDD I SHDN PSRR Operating mode, no load, IN = OS = COM SHDN = GND, CLK driven from 0 to VDD Measured at DC 2.7 2 0.2 60 3.6 3.5 1 V mA A dB fOSC ICLK VIH VIL COSC = 1000pF (Note 4) VCLK = 0 or 3V VDD - 0.5 0.5 26 34 15 43 30 kHz A V V SYMBOL CONDITIONS MIN TYP MAX UNITS
FILTER CHARACTERISTICS--MAX7401/MAX7405
(VDD = +5V for MAX7401, VDD = +3V for MAX7405; filter output measured at OUT; 10k || 50pF load to GND at OUT; SHDN = VDD; VCOM = VOS = VDD /2; fCLK = 100kHz; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25C.) PARAMETER fIN = 0.5fC Insertion Gain Relative to DC Gain fIN = fC fIN = 3fC fIN = 6fC CONDITIONS MIN -1.0 -3.3 TYP -0.8 -3.0 -33 -79 MAX -0.6 -2.7 -29 -74 dB UNITS
Note 1: The maximum fC is defined as the clock frequency, fCLK = 100 * fC, at which the peak SINAD drops to 68dB with a sinusoidal input at 0.2fC. Note 2: DC insertion gain is defined as VOUT / VIN. Note 3: OS voltages above VDD - 1V saturate the input and result in a 75A typical input leakage current. Note 4: For MAX7401, fOSC (kHz) 38 * 103 / COSC (pF). For MAX7405, fOSC (kHz) 34 * 103 / COSC (pF).
4
_______________________________________________________________________________________
8th-Order, Lowpass, Bessel, Switched-Capacitor Filters
Typical Operating Characteristics
(VDD = +5V for MAX7401, VDD = +3V for MAX7405; fCLK = 100kHz; SHDN = VDD; VCOM = VOS = VDD / 2; TA = +25C; unless otherwise noted.)
FREQUENCY RESPONSE
MAX7401 toc01
MAX7401/MAX7405
PASSBAND FREQUENCY RESPONSE
MAX7409 toc02
PHASE RESPONSE
fC = 1kHz -50 PHASE SHIFT (DEGREES) -100 -150 -200 -250 -300 -350 -400
MAX7401 toc03
10 fC = 1kHz 0 -10 GAIN (dB)
0.5 fC = 1kHz 0 -0.5 GAIN (dB) -1.0 -1.5 -2.0 -2.5 -3.0
0
-20 -30 -40 -50 -60 -70 0 1 2 3 4 5 INPUT FREQUENCY (kHz)
-3.5 0 202 404 606 808 1010 INPUT FREQUENCY (Hz)
0
400
800
1200
1600
2000
INPUT FREQUENCY (Hz)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX7401 toc04
SUPPLY CURRENT vs. TEMPERATURE
MAX7401 toc05
OFFSET VOLTAGE vs. SUPPLY VOLTAGE
VIN = VCOM = VDD / 2 15 OFFSET VOLTAGE (mV) 10 5 0 -5 -10 -15 -20 2.5 3.0 3.5 4.0 4.5 5.0 5.5 MAX7405 MAX7401
MAX7401 toc06
2.5 2.4 2.3 SUPPLY CURRENT (mA) 2.2 2.1 2.0 1.9 1.8 1.7 1.6 1.5 2.5 3.0 3.5 4.0 4.5 5.0 MAX7405 MAX7401 NO LOAD
2.03 NO LOAD 2.02 SUPPLY CURRENT (mA) 2.01 MAX7401 2.00 1.99 MAX7405 1.98 1.97 -40 -20 0 20 40 60 80
20
5.5
100
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
SUPPLY VOLTAGE (V)
OFFSET VOLTAGE vs. TEMPERATURE
MAX7401 toc07
INTERNAL OSCILLATOR FREQUENCY vs. COSC CAPACITANCE
MAX7401 toc08
NORMALIZED OSCILLATOR FREQUENCY vs. SUPPLY VOLTAGE
NORMALIZED OSCILLATOR FREQUENCY 1.15 1.10 1.05 1.00 0.95 0.90 0.85 0.80 2.5 3.0 3.5 4.0 4.5 5.0 5.5 MAX7401 MAX7405 COSC = 390pF
MAX7401 toc09
1.0 VIN = VCOM = VDD / 2 0.5 OFFSET VOLTAGE (mV)
10,000 OSCILLATOR FREQUENCY (kHz)
1.20
1000
0
100
-0.5
10
-1.0
1
-1.5 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
0.1 0.01 0.1 1 10 100 1000 COSC CAPACITANCE (nF)
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
5
8th-Order, Lowpass, Bessel, Switched-Capacitor Filters MAX7401/MAX7405
Typical Operating Characteristics (continued)
(VDD = +5V for MAX7401, VDD = +3V for MAX7405; fCLK = 100kHz; SHDN = VDD; VCOM = VOS = VDD / 2; TA = +25C; unless otherwise noted.)
NORMALIZED OSCILLATOR FREQUENCY vs. TEMPERATURE
MAX7401 toc10
MAX7401 THD PLUS NOISE vs. INPUT SIGNAL AMPLITUDE
MAX7401 toc11
MAX7401 THD PLUS NOISE vs. INPUT SIGNAL AMPLITUDE AND RESISTIVE LOAD
-10 -20 THD + NOISE (dB) -30 -40 -50 -60 -70 -80 -90 RL = 500 RL = 1k RL = 10k fIN = 200Hz fC = 1kHz MEASUREMENT BW = 22kHz
MAX7401 toc12
1.04 NORMALIZED OSCILLATOR FREQUENCY 1.03 1.02 1.01 1.00 0.99 0.98 0.97 0.96 -40 -20 0 20 40 60 80 MAX7405 MAX7401 COSC = 390pF
0 -10 -20 THD + NOISE (dB) -30 -40 -50 -60 -70 -80 -90 B A NO LOAD (SEE TABLE A)
0
100
0
1
2
3
4
5
0
1
2
3
4
5
TEMPERATURE (C)
AMPLITUDE (Vp-p)
AMPLITUDE (Vp-p)
MAX7405 THD PLUS NOISE vs. INPUT SIGNAL AMPLITUDE
MAX7401 toc13
MAX7405 THD PLUS NOISE vs. INPUT SIGNAL AMPLITUDE AND RESISTIVE LOAD
-10 -20 THD + NOISE (dB) -30 -40 -50 -60 -70 -80 -90 RL = 500 RL = 1k RL = 10k fIN = 200Hz fC = 1kHz MEASUREMENT BW = 22kHz
MAX7401 toc14
0 -10 -20 THD + NOISE (dB) -30 -40 -50 -60 -70 -80 -90 0 0.5 1.0 1.5 2.0 2.5 A B NO LOAD (SEE TABLE A)
0
3.0
0
0.5
1.0
1.5
2.0
2.5
3.0
AMPLITUDE (Vp-p)
AMPLITUDE (Vp-p)
Table A. THD Plus Noise vs. Input Signal Amplitude Test Conditions
TRACE A B 6 fIN (Hz) 1000 200 fC (kHz) 5 1 fCLK (kHz) 500 100 MEASUREMENT BANDWIDTH (kHz) 80 22
_______________________________________________________________________________________
8th-Order, Lowpass, Bessel, Switched-Capacitor Filters MAX7401/MAX7405
Pin Description
PIN 1 2 3 4 5 6 7 8 NAME COM IN GND VDD OUT OS SHDN CLK FUNCTION Common Input. Biased internally at mid-supply. Bypass externally to GND with a 0.1F capacitor. To override internal biasing, drive with an external supply. Filter Input Ground Positive Supply Input: +5V for MAX7401, +3V for MAX7405 Filter Output Offset Adjust Input. To adjust output offset, bias OS externally. Connect OS to COM if no offset adjustment is needed. Refer to Offset and Common-Mode Input Adjustment section. Shutdown Input. Drive low to enable shutdown mode; drive high or connect to VDD for normal operation. Clock Input. To override the internal oscillator, connect to an external clock; otherwise, connect an external capacitor (COSC) from CLK to GND to set the internal oscillator frequency.
_______________Detailed Description
The MAX7401/MAX7405 Bessel filters provide low overshoot and fast settling responses. Both parts operate with a 100:1 clock-to-corner frequency ratio and a 5kHz maximum corner frequency. Lowpass Bessel filters such as the MAX7401/MAX7405 delay all frequency components equally, preserving the shape of step inputs (subject to the attenuation of the higher frequencies). Bessel filters settle quickly--an important characteristic in applications that use a multiplexer (mux) to select an input signal for an analog-todigital converter (ADC). An anti-aliasing filter placed between the mux and the ADC must settle quickly after a new channel is selected. Figure 1 shows the difference between Bessel and Butterworth filters when a 1kHz square wave is applied to the filter input. With the filter cutoff frequencies set at 5kHz, trace B shows the Bessel filter response and trace C shows the Butterworth filter response.
A
2V/div
B
2V/div
C
2V/div
200s/div A: 1kHz INPUT SIGNAL B: BESSEL FILTER RESPONSE; fC = 5kHz C: BUTTERWORTH FILTER RESPONSE; fC = 5kHz
Figure 1. Bessel vs. Butterworth Filter Response
Background Information
Most switched-capacitor filters (SCFs) are designed with biquadratic sections. Each section implements two filtering poles, and the sections are cascaded to produce higher order filters. The advantage to this approach is ease of design. However, this type of design is highly sensitive to component variations if any section's Q is high. An alternative approach is to emulate a passive network using switched-capacitor integrators with summing and scaling. Figure 2 shows a basic 8th-order ladder filter structure.
R1 + -
L1 C2
L3 C4
L5 C6
L7 R2 V0
VIN
C8
Figure 2. 8th-Order Ladder Filter Network
_______________________________________________________________________________________
7
8th-Order, Lowpass, Bessel, Switched-Capacitor Filters MAX7401/MAX7405
A switched-capacitor filter such as the MAX7401/ MAX7405 emulates a passive ladder filter. The filter's component sensitivity is low when compared to a cascaded biquad design because each component affects the entire filter shape, not just one pole-zero pair. In other words, a mismatched component in a biquad design will have a concentrated error on its respective poles, while the same mismatch in a ladder filter design results in an error distributed over all poles.
Low-Power Shutdown Mode
These devices feature a shutdown mode that is activated by driving SHDN low. In shutdown mode, the filter's supply current reduces to 0.2A (typ) and its output becomes high impedance. For normal operation, drive SHDN high or connect to VDD.
___________Applications Information
Offset and Common-Mode Input Adjustment
The voltage at COM sets the common-mode input voltage and is biased at mid-supply with an internal resistordivider. Bypass COM with a 0.1F capacitor and connect OS to COM. For applications requiring offset adjustment or DC level shifting, apply an external bias voltage through a resistor-divider network to OS, as shown in Figure 3. (Note: Do not leave OS unconnected.) The output voltage is represented by this equation: VOUT = (VIN - VCOM) + VOS with VCOM = VDD / 2 (typical), and where (VIN - VCOM) is lowpass filtered by the SCF, and VOS is added at the output stage. See the Electrical Characteristics for the voltage range of COM and OS. Changing the voltage on COM or OS significantly from mid-supply reduces the filter's dynamic range.
Clock Signal
External Clock The MAX7401/MAX7405 family of SCFs is designed for use with external clocks that have a 40% to 60% duty cycle. When using an external clock with these devices, drive CLK with a CMOS gate powered from 0 to VDD. Varying the rate of the external clock adjusts the corner frequency of the filter as follows:
fC = fCLK / 100
Internal Clock When using the internal oscillator, connect a capacitor (C OSC) between CLK and ground. The value of the capacitor determines the oscillator frequency as follows:
fOSC (kHz) = K 10 3 ; COSC in pF COSC
where K = 38 for MAX7401 and K = 34 for MAX7405. Minimize the stray capacitance at CLK so that it does not affect the internal oscillator frequency. Vary the rate of the internal oscillator to adjust the filter's corner frequency by a 100:1 clock-to-corner frequency ratio. For example, an internal oscillator frequency of 100kHz produces a nominal corner frequency of 1kHz.
Power Supplies
The MAX7401 operates from a single +5V supply, and the MAX7405 operates from a single +3V supply. Bypass VDD to GND with a 0.1F capacitor. If dual supplies are required (2.5V for MAX7401, 1.5V for MAX7405), connect COM to system ground and connect
VSUPPLY
Input Impedance vs. Clock Frequencies
The MAX7401/MAX7405's input impedance is effectively that of a switched-capacitor resistor and is inversely proportional to frequency. The input impedance values determined below represent the average input impedance since the input current is not continuous. As a rule, use a driver with an output impedance less than 10% of the filter's input impedance. Estimate the input impedance of the filter using the following formula: ZIN =
0.1F VDD INPUT IN SHDN OUT COM 0.1F
OUTPUT 50k
MAX7401 MAX7405
CLOCK CLK OS 0.1F GND 50k 50k
(fCLK CIN )
1
where fCLK = clock frequency and CIN = 3.37pF.
Figure 3. Offset Adjustment Circuit
8
_______________________________________________________________________________________
8th-Order, Lowpass, Bessel, Switched-Capacitor Filters MAX7401/MAX7405
Table 1. Typical Harmonic Distortion
FILTER fCLK (kHz) 100 MAX7401 500 100 MAX7405 500 5 1000 5 1 1000 200 2 -83 -82 -88 -88 fC (kHz) 1 fIN (Hz) 200 4 -89 -87 -79 -83 -92 -87 -92 -88 VIN (Vp-p) TYPICAL HARMONIC DISTORTION (dB) 2nd -91 3rd -83 4th -90 5th -93
Anti-Aliasing and Post-DAC Filtering
V+
VDD INPUT IN
SHDN OUT COM
* OUTPUT
V+ V-
CLOCK
CLK
MAX7401 MAX7405
OS 0.1F 0.1F
When using the MAX7401/MAX7405 for anti-aliasing or post-DAC filtering, synchronize the DAC and the filter clocks. If the clocks are not synchronized, beat frequencies may alias into the passband. The high clock-to-corner frequency ratio (100:1) also eases the requirements of pre- and post-SCF filtering. At the input, a lowpass filter prevents the aliasing of frequencies around the clock frequency into the passband. At the output, a lowpass filter attenuates the clock feedthrough. A high clock-to-corner frequency ratio allows a simple RC lowpass filter, with the cutoff frequency set above the SCF corner frequency, to provide input anti-aliasing and reasonable output clock attenuation.
GND
V*DRIVE SHDN TO V- FOR LOW-POWER SHUTDOWN MODE.
Harmonic Distortion
Harmonic distortion arises from nonlinearities within the filter. These nonlinearities generate harmonics when a pure sine wave is applied to the filter input. Table 1 lists the MAX7401/MAX7405's typical harmonic-distortion values with a 10k load at TA = +25C.
Figure 4. Dual-Supply Operation
GND to the negative supply. Figure 4 shows an example of dual-supply operation. Single- and dual-supply performance are equivalent. For either single- or dual-supply operation, drive CLK and SHDN from GND (V- in dualsupply operation) to VDD. For 5V dual-supply applications, use the MAX291-MAX297.
Chip Information
TRANSISTOR COUNT: 1116
Input Signal Amplitude Range
The optimal input signal range is determined by observing the voltage level at which the total harmonic distortion plus noise (THD+N) is minimized for a given corner frequency. The Typical Operating Characteristics show graphs of the devices' THD+N response as the input signal's peak-to-peak amplitude is varied. These measurements are made with OS and COM biased at midsupply.
_______________________________________________________________________________________
9
8th-Order, Lowpass, Bessel, Switched-Capacitor Filters MAX7401/MAX7405
________________________________________________________Package Information
SOICN.EPS
10
______________________________________________________________________________________
8th-Order, Lowpass, Bessel, Switched-Capacitor Filters MAX7401/MAX7405
Package Information (continued)
PDIPN.EPS
______________________________________________________________________________________
11
8th-Order, Lowpass, Bessel, Switched-Capacitor Filters MAX7401/MAX7405
NOTES
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

▲Up To Search▲

Price & Availability of MAX7401

	To Download MAX7401 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .